# Intel learned to limit how much innovation goes into each node

Markdown copy of https://realalpha.app/s/intel-learned-to-limit-how-much-innovation-goes-into-each/ on Real Alpha, the best minutes from long interviews with the people building AI. Cite and link the page, not this copy.

- Speaker: [Chris Oth](https://realalpha.app/people/chris-oth/)
- Host: [Dwarkesh Patel](https://realalpha.app/people/dwarkesh-patel/) · Host, Dwarkesh Podcast · Co-wrote The Scaling Era, an oral history of AI; named to TIME100 AI.
- Show: Dwarkesh Podcast
- Episode: [What will computer chips look like in 2045?](https://realalpha.app/v/frYSOKvNiiE/), Oct 22, 2026
- Moment: 2:54 to 5:41 of the episode (3 min), playing on https://realalpha.app/s/intel-learned-to-limit-how-much-innovation-goes-into-each/; the episode from there: https://realalpha.app/v/frYSOKvNiiE/?t=174

## Quote

> “you don't want to do **too much innovation in one node**. Because the more innovation that you did, the more complex it becomes.”
> — [Chris Oth](https://realalpha.app/people/chris-oth/) at [2:55](https://realalpha.app/v/frYSOKvNiiE/?t=175) · Dwarkesh Podcast

## Takeaways

1. 10nm paired aggressive scaling with tools that weren't ready.
2. Too many new ideas increased the burden on engineers and process.
3. Intel limits node-level innovation to protect schedules.

## About this segment

Chris Oth says 10nm's aggressive scaling and delayed EUV added complexity. Intel now limits node-level innovation to protect schedules customers depend on.

From “What will computer chips look like in 2045?”, Oct 22, 2026. [Watch the full episode](https://realalpha.app/v/frYSOKvNiiE/)

## Transcript

Transcribed by machine (Whisper) from the episode’s audio, so a word may be off here and there.

[2:57](https://realalpha.app/v/frYSOKvNiiE/?t=177) we've learned is that you don't want to do too much innovation in one node. Because the more innovation that you did, the more complex it becomes. And while you'll be able to get that to work, you need to hit a certain schedule. And that's the schedule that your customer ultimately wants. So having that predictable schedule is a key piece. So you've got to figure out how much innovation you can put in in order to meet the customer's requirements in the timeline that they needed.

[3:21](https://realalpha.app/v/frYSOKvNiiE/?t=201) Intel learned how costly that trade-off can be with delays to its 10 nanometer node, whose original target launch date was 2016, but which didn't begin manufacturing until 2018. You know, usually Intel has been the keeper of Moore's law, a new cadence of manufacturing every two years, but their last set of products slipped almost four years. Intel today having its worst day in four months, the stock now down more than 15%.

[3:47](https://realalpha.app/v/frYSOKvNiiE/?t=227) I also want to point out Taiwan Semiconductor up 13. 15% off of Intel's bad news. Walk me through what lessons you think Intel has learned from 10 nanometer. 10 nanometer. It was a good example of where we had very aggressive targets. We were doing what was called hyperscaling at the time, so we were scaling much faster than what had been historically done. In order to do that, we came up with all sorts of innovative ideas and how we could achieve that without new tools because the tools weren't ready.

[4:22](https://realalpha.app/v/frYSOKvNiiE/?t=262) And so that put a lot of burden on the process and a lot of burden on the engineers in order to do that. Now, at the end of the day, 10 nanometers are great technology. It has world-class yield, it has world-class performance, it has world-class cost. But it took us longer to do that than what we would have liked. And so we've kind of tried to take that learning into future technology nodes and say, hey, we need to limit the amount of innovation we put in there to make sure that we keep it on schedule.

[4:46](https://realalpha.app/v/frYSOKvNiiE/?t=286) What do you think was the main technology that should have been safe for a future version? EUV was probably the big thing. When we started to define 10 nanometer, what the conclusion was, EUV was not ready. EUV is extreme ultraviolet lithography. It prints chip patterns with light at a wavelength of 13.5 nanometers, about 14 times shorter than that emitted by previous tools that chipmakers had relied on.

[5:13](https://realalpha.app/v/frYSOKvNiiE/?t=313) The shorter the wavelength, the finer the features that a single exposure can print. But Intel decided this technology wasn't going to be ready in time. TSMC transitioned to EUV much sooner. It put EUV into volume manufacturing in 2019 and ramped it up further on its 5nm node in 2020. Intel's first EUV process did not reach products until 2023, so TSMC had about four more years of experience with these machines.