Stacked transistors need years of process development

Transcript

Transcribed by machine (Whisper) from the episode’s audio, so a word may be off here and there.

1. 32:40

   future it'll be ruthenium. I'd love to get your thoughts on CPET, basically stacking the transistors on top of each other. What is progress like there? Can we keep making more and more layers? Is it just two? Can we go three, four? How high can you get? Yeah, so that evaluation of CPET is currently underway, not just by us, by our competition. Labs externally are looking at it. It is the ultimate in stackability. We're taking transistors that had to be compressed more and more, and we're relaxing that in some ways because we're going to stack them on top of each other.

2. 33:14

   But the act of stacking does not mean that they're not interconnected. What used to be connections on the top or even on the bottom, as you've seen from our press release, now has to go vertically in between the transistors. And that's a new challenge because the aspect ratio of creating trenches and filling those trenches becomes more and more difficult. So it's not as straightforward as stacking the transistors because you still have to think about interconnecting them.

3. 33:40

   Is the issue there the etch to get that deep hole? Aspect ratio for the etches is a big part of it. We're working with our vendors to evolve on that. But it's also what you fill those very tiny spaces with because filling can sometimes leave air gaps or holes that never really fill, and that's not ideal. I assume there's a version of CFED that works inside this lab. What is the kind of wafer or process or whatever that is working right now?

4. 34:05

   Then what's the next step? What's the next step? What's the next step? Until it's inside the full high-volume process. Part of the process of evolving these technologies, especially something more complex like an architecture, not just a basic chemistry or material, but a full architecture like CFET, is that we have to make short-loop vehicles that can give us faster turnaround. The normal manufacturing process can take a month or longer to complete the thousands of steps that it goes through.

5. 34:35

   Our goal here is to take unit cells of that process and qualify them. So we take advantage of short loop vehicles that can give us, you know, electrical parameters, chemical parameters that can resolve some of those challenges, those speed bumps. And once we've resolved them, then we combine them into a more complex test vehicle. So what you would find in here is something very simple. You might be making a diode.

6. 35:03

   You might be making a capacitor, which are components of the transistor. and as those evolve and become stronger, better performing, you combine them to make the next stage, which might be the transistor itself. So in the CFET example, you might not choose to do four ribbons on top of four ribbons. You might just choose to do one-on-one because naturally the aspect ratio of dealing with something that much taller becomes more and more challenging.

7. 35:31

   So we would have a simplified version of a CFET, which has only one wire for the NMOS and one wire for the PMOS. And that simplifies our job, but it still helps us evaluate the stacking of devices and how they will interconnect. But are the feature sizes here as small as they will be eventually, or are the feature sizes bigger as well? Oh, absolutely. In some cases, at least as small. Oh. For example, you know, you've heard of 2D materials, these…

8. 36:00

   Transition layer dicot collagenides, as they're called, they're very, very thin materials. They're essentially one monolayer of atoms that we deal with. Those depositions can happen in this lab. We can evaluate those films in terms of conductivity, our ability to contact them, our ability to modulate that conductivity, which is what the transistor does. So yes, we do have the ability to not only deposit films that are very small and thin, to the atomic scale, but also print very small features.

9. 36:33

   We have EUV technology that can, or e-beam technology that can allow us to print very small features, similar to what we will eventually make in production. So I guess I don't understand intuitively, lacking the context in this process, why that you have the features that are as small for working CFET right now. Yes. Why will it take 10 years for it to be in my phone? I understand that it's like a process, but why is it such a long process?

10. 37:05

    The answer is slightly different when you're dealing with an architecture like CFIT versus a novel material. Materials have, of course, the challenges of being deposited, etched, removed. Their compatibility with other layers above and below. All those things have to be researched first before you put them in a production line. An architecture may seem like a simple evolution. Oh, you're making nanoribbon transistors next to each other.

11. 37:32

    What's wrong with just stacking them? But the act of stacking them, of course, increases the aspect ratio for etches, depositions, cleans. And the technology may simply not be ready yet. But if you've already made it here, there's a version of the technology that's ready, right? Correct. So we've made a simplified version that may not be an advantage over our current planar side-by-side technology of nanoribbons.

12. 37:59

    But we need to evolve it to make it maybe two nanoribbons or to add the right type of metals and dielectrics in order to extract the maximum performance out of that device. Got it. There's a thousand different steps that all have to come together in a very unique way to make the performance compatible or actually supersede the prior technology. Where do the ideas tend to fail? You have 20 ideas that are 2D materials. What is the kind of way in which you're like, this is actually not worth pursuing further?

13. 38:31

    Sometimes the idea becomes something that we discover fundamentals about the material that will be incompatible with the rest of the processing that we do. At first, the first level of experiments may simply be very simple depositions. And you say, OK, I can deposit the film. I can look at it. I can measure it. But the moment I try to make a contact to it, nothing sticks. It could be something fundamental as simple as the adhesion of the next step in the process simply has no way to adhere to the material.

14. 39:05

    So you may rule out a material because of something as simple as that. More complex challenges might be the subsequent processing may have gaseous interactions with downstream steps. So, for example, I've deposited the film, I've capped it with other materials, but they're not hermetic. And so my third or fourth or fifth step in the process may actually still interact with it and change its properties.

15. 39:33

    That makes it unstable, and now we have to find better hermetic ceiling for that process. And if we don't find a way to control it, then it's a dead end for us.